1. Technology Field
The present invention relates to a data storing method for a flash memory module, a memory controller using the method, and a memory storage apparatus using the method.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand for storage media has increased drastically. Since a rewritable non-volatile memory has the characteristics of non-volatility of data, low power consumption, small volume, non-mechanical structure, and fast reading and writing speed, the rewritable non-volatile memory is the most adaptable memory to be applied in a portable electronic product, e.g., a notebook computer. A solid state drive (SSD) is a storage apparatus which utilizes a flash memory as its storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
An NAND flash memory may be classified into a Single Level Cell (SLC) NAND flash memory, a Multi Level Cell (MLC) NAND flash memory, or a Trinary Level Cell (TLC) NAND flash memory according to the number of bits which each memory cell thereof is capable of storing. Specifically, each memory cell in the SLC NAND flash memory can store one bit of data (i.e., “1” or “0”), each memory cell in the MLC NAND flash memory can store two bits of data, and each memory cell in the TLC NAND flash memory can store three bits of data.
In the NAND flash memory, a physical page is composed of several memory cells arranged on the same word line. Since each memory cell in the SLC NAND flash memory can store one bit of data, several memory cells arranged on the same word line in the SLC NAND flash memory correspond to one physical page.
By contrast, a floating gate storage layer in each memory cell of the MLC NAND flash memory can store two bits of data, and each storage state (i.e., “11,” “10,” “01,” or “00”) includes the least significant bit (LSB) and the most significant bit (MSB). For instance, the first bit from the left of the storage states is the LSB, and the second bit from the left of the storage states is the MSB. Accordingly, several memory cells arranged on the same word line may constitute two physical pages, wherein the physical pages constituted by the LSB of the memory cells are referred to as lower physical pages and the physical pages constituted by the MSB of the memory cells are referred to as upper physical pages. The speed of writing data into the lower physical page is faster than writing data into the upper physical page, and when a program failure occurs in the process of programming the upper physical page, the data stored in the lower physical page corresponding to the programmed upper physical page may be lost.
Similarly, each memory cell in the TLC NAND flash memory can store three bits of data, and each storage state (i.e., “111,” “110,” “101,” “100,” “011,” “010,” “001,” or “000”) includes the first bit (i.e., the LSB), the second bit (i.e., the center significant bit, CSB), and the third bit (i.e., the MSB) from the left of the storage states. Accordingly, several memory cells arranged on the same word line may constitute three physical pages, wherein the physical pages constituted by the LSB of the memory cells are referred to as lower physical pages, the physical pages constituted by the CSB of the memory cells are referred to as center physical pages, and the physical pages constituted by the MSB of the memory cells are referred to as upper physical pages. In particular, while several memory cells on the same word lines are programmed, only the lower physical page can be programmed, or all of the lower, the center, and the upper physical pages need be simultaneously programmed; otherwise, the stored data may be lost.
However, regardless of SLC flash memory, MLC flash memory or TLC flash memory, when data stored in the same block is read repeatedly (for example, between 100000 times and 1000000 times), the data read may be incorrect or data stored in this block may even be lost. Such a situation is usually referred as “read disturb” by people skilled in the art. In particular, the system data (for example, a firmware code and a file allocation table (FAT)) of a flash memory storage system is stored in a flash memory, and the system data is frequently read during the operation of the flash memory storage system. Accordingly, a technique for resolving the problem of read disturb has to be provided for effectively preventing data loss caused by read disturb.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.